Feature |
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Fully Synchronous to Positive Clock Edge |
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Single 3.3V ±0.3V Power Supply |
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LVTTL Compatible with Multiplexed Address |
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Programmable Burst Length (B/L) - 1, 2, 4,
8 or Full Page |
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Programmable CAS Latency (C/L) - 2 or 3 |
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Data Mask (DQM) for Read / Write Masking |
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Programmable Wrap Sequence |
– Sequential (B/L = 1/2/4/8/full
Page) |
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– Interleave (B/L = 1/2/4/8) |
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Burst Read with Single-bit Write Operation |
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All Inputs are Sampled at the Rising Edge
of the System Clock |
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Auto Refresh and Self Refresh |
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4,096 Refresh Cycles / 64ms (15.6us) |