Feature |
|
|
Fully synchronous to positive clock edge |
|
|
Single 2.7V~3.6V power supply |
|
|
LVCMOS compatible with multiplexed address |
|
|
Programmable Burst Length (B/L) - 1,2,4,8
or full page |
|
|
Programmable CAS Latency (C/L) - 2 or 3 |
|
|
Data Mask (DQM) for Read / Write masking |
|
|
Programmable wrap sequence |
- Sequential (B/L = 1/2/4/8/full page
) |
|
- Interleave (B/L = 1/2/4/8 ) |
|
|
|
Burst read with single-bit write operation |
|
|
Deep power down
mode. |
|
|
Auto refresh and
self refresh. |
|
|
Special function support. |
-PASR(Partial Array Self
Refresh) |
|
|
|
-Auto TCSR(Temperature
Compensated Self Refresh) |
|
|
Programmable drive
strength control |
|
|
|
-Full strength or 1/2,1/4 of
full strength |
|
|
4,096 refresh
cycles / 64ms(15.625us) |
|
|
|
|
|
|