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The EM48AM3284LBB is Synchronous Dynamic Random Access Memory (SDRAM)
organized as 4Meg x 4 banks x 32 bits.All inputs and outputs are synchronized with the positive edge
of the clock.
The 512Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates
and is designed to operate at 1.8V low power memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs voltage levels are compatible with LVCMOS.
Fully synchronous to positive clock edge
VDD= 1.7V~1.9V for 133MHz & 166MHz
LVCMOS compatible with multiplexed address
Programmable Burst Length (B/L) - 1,2,4,8
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